dc.contributor.author | ZEGU | |
dc.date.accessioned | 2024-07-22T11:06:12Z | |
dc.date.available | 2024-07-22T11:06:12Z | |
dc.date.issued | 2024-06-10 | |
dc.identifier.uri | http://10.0.100.40:8080/xmlui/handle/123456789/2647 | |
dc.description | Past Exam Paper | en_US |
dc.language.iso | en | en_US |
dc.publisher | ZEGU | en_US |
dc.subject | Hierarchical Memory Organization | en_US |
dc.subject | Cache Memory | en_US |
dc.subject | Addressing Modes | en_US |
dc.subject | Logic Circuit | en_US |
dc.subject | Boolean Expression | en_US |
dc.title | Computer Organisation and Architecture | en_US |
dc.title.alternative | BIS 124 | en_US |
dc.type | Other | en_US |